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litesom:devicetree [2017/02/11 20:45]
filug [Available device tree files] 		litesom:devicetree [2017/02/11 20:46]
filug
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 On the following pages you can find more examples about //device tree// fir [[:liteSOM]] and [[litesom:liteboard]]: On the following pages you can find more examples about //device tree// fir [[:liteSOM]] and [[litesom:liteboard]]:
  
- +FIXME link examples
-==== end ==== +
- +
- +
----- +
- +
-FIXME change TX to RX +
- +
-Each define name is build with the following syntax ''<PAD NAME>_<MUX_MODE>''. Each ALT//X// function for ''UART1_TX'' PAD can be configured as presented below. +
- +
-|        ALT function          |            Define name                  |  +
-| ALT0 mux port: UART1_TX      | MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX   |  +
-|                              | MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX   |  +
-| ALT1 mux port: ENET1_RDATA02 | MX6UL_PAD_UART1_TX_DATA__ENET1_RDATA02  |  +
-| ALT2 mux port: I2C3_SCL      | MX6UL_PAD_UART1_TX_DATA__I2C3_SCL       |  +
-| ALT3 mux port: CSI_DATA02    | MX6UL_PAD_UART1_TX_DATA__CSI_DATA02     |  +
-| ALT4 mux port: GPT1_COMPARE1 | MX6UL_PAD_UART1_TX_DATA__GPT1_COMPARE1  |  +
-| ALT5 mux port: GPIO1_IO16    | MX6UL_PAD_UART1_TX_DATA__GPIO1_IO16     |  +
-| ALT8 mux port: SPDIF_OUT     | MX6UL_PAD_UART1_TX_DATA__SPDIF_OUT      |  +
- +
-Based on all defines from [[https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/imx6ul-pinfunc.h|imx6ul-pinfunc.h]] file you can build configuration for ''IOMUX Controller''. +
- +
- +
- +
----- +
- +
- +
-To configure ''IOMUX Controller'' for each pad following registers must  +
- +
- allows to configure one pad to share up to eight functional blocks.   +
- +
- +
-''IOMUX Controller'' allows to share one pad to several (up to eight) functional blocks. +
- +
-''IOMUX Controller'' allows to share several (up to eight) functional signals on single I/O pad. For example ''UART1_TX_DATA'' pin can be configured via ''SW_MUX_CTL_PAD_UART1_TX_DATA SW MUX'' register to provide following signals: +
- +
-  * ALT0 — Select mux mode: ALT0 mux port: UART1_TX of instance: uart1, +
-  * ALT1 — Select mux mode: ALT1 mux port: ENET1_RDATA02 of instance: enet1, +
-  * ALT2 — Select mux mode: ALT2 mux port: I2C3_SCL of instance: i2c3, +
-  * ALT3 — Select mux mode: ALT3 mux port: CSI_DATA02 of instance: csi, +
-  * ALT4 — Select mux mode: ALT4 mux port: GPT1_COMPARE1 of instance: gpt1, +
-  * ALT5 — Select mux mode: ALT5 mux port: GPIO1_IO16 of instance: gpio1, +
-  * ALT8 — Select mux mode: ALT8 mux port: SPDIF_OUT of instance: spdif. +
-  +
-On [[litesom:liteboard]] we are using this pin as ''UART1_TX'' - it is our debug console output. Therefore in [[https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/imx6ul-liteboard.dts|imx6ul-liteboard.dts]] file you can find following configuration. +
- +
-<columns 100% 50% - -> +
-<code> +
-/ { +
-    chosen { +
-        stdout-path = &uart1; +
-    }; +
-}; +
- +
-&iomuxc { +
-    pinctrl_uart1: uart1grp { +
-        fsl,pins = < +
-            MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX  0x1b0b1 +
-            MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX  0x1b0b1 +
-        >; +
-    }; +
-} +
- +
-&uart1 { +
-    pinctrl-names = "default"; +
-    pinctrl-0 = <&pinctrl_uart1>; +
-    status = "okay"; +
-}; +
-</code> +
-<newcolumn> +
-  * ''chosen/stdout-path'' - informs kernel specify device used as a boot console (see [[https://www.kernel.org/doc/Documentation/devicetree/bindings/chosen.txt|choosen.txt]]), +
-  * ''uart1/status'' - enables ''UART1'' peripheral, +
-  * ''uart1/pinctrl-0'' - informs kernel where to find pinmux configuration for ''UART1'', +
-  * ''iomuxc/pinctrl_uart1'' - contains configuration for I/O PADS. +
-</columns> +
- +
-[[https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/imx6ul-pinfunc.h|imx6ul-pinfunc.h]] contains all allowed PAD configurations for ''i.MX6UL''. In our case for each mentioned above //alternate function// you can find items as presented below.  +
- +
-<code> +
-#define MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x0084 0x0310 0x0000 0 0 +
-#define MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX 0x0084 0x0310 0x0624 0 2 +
-#define MX6UL_PAD_UART1_TX_DATA__ENET1_RDATA02 0x0084 0x0310 0x0000 1 0 +
-#define MX6UL_PAD_UART1_TX_DATA__I2C3_SCL 0x0084 0x0310 0x05b4 2 0 +
-#define MX6UL_PAD_UART1_TX_DATA__CSI_DATA02 0x0084 0x0310 0x04c4 3 1 +
-#define MX6UL_PAD_UART1_TX_DATA__GPT1_COMPARE1 0x0084 0x0310 0x0000 4 0 +
-#define MX6UL_PAD_UART1_TX_DATA__GPIO1_IO16 0x0084 0x0310 0x0000 5 0 +
-#define MX6UL_PAD_UART1_TX_DATA__SPDIF_OUT 0x0084 0x0310 0x0000 8 0 +
-</code> +
- +
-  * 0x0084 - address of ''SW_MUX_CTL_PAD_UART1_TX_DATA SW MUX Control Register'' +
-  * 0x0310 - address of ''SW_PAD_CTL_PAD_UART1_TX_DATA SW PAD Control Register'' +
-  * 0x0000 - address of ''UART1_RX_DATA_SELECT_INPUT DAISY Register'' +
-  * 0  +
-  * 0 +
- +
-FIXME change TX to RX +
- +
-Each define name is build with the following syntax ''<PAD NAME>_<MUX_MODE>''. Each ALT//X// function for ''UART1_TX'' PAD can be configured as presented below. +
- +
-|        ALT function          |            Define name                  |  +
-| ALT0 mux port: UART1_TX      | MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX   |  +
-|                              | MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX   |  +
-| ALT1 mux port: ENET1_RDATA02 | MX6UL_PAD_UART1_TX_DATA__ENET1_RDATA02  |  +
-| ALT2 mux port: I2C3_SCL      | MX6UL_PAD_UART1_TX_DATA__I2C3_SCL       |  +
-| ALT3 mux port: CSI_DATA02    | MX6UL_PAD_UART1_TX_DATA__CSI_DATA02     |  +
-| ALT4 mux port: GPT1_COMPARE1 | MX6UL_PAD_UART1_TX_DATA__GPT1_COMPARE1  |  +
-| ALT5 mux port: GPIO1_IO16    | MX6UL_PAD_UART1_TX_DATA__GPIO1_IO16     |  +
-| ALT8 mux port: SPDIF_OUT     | MX6UL_PAD_UART1_TX_DATA__SPDIF_OUT      |  +
- +
-Based on all defines from [[https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/imx6ul-pinfunc.h|imx6ul-pinfunc.h]] file you can build configuration for ''IOMUX Controller''. +
- +
- +
- +
-[[https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt]] +
- +
-[[https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt]] +
- +
-===== liteSOM device tree ===== +
- +
-[[https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/imx6ul-litesom.dtsi|imx6ul-litesom.dtsi]] file includes [[https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/imx6ul.dtsi|imx6ul.dtsi]] file and appends all items required to configure [[:litesom]].   +
- +
-===== liteboard device tree ===== +
- +
-For [[litesom:liteboard]] based project you can use [[https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/imx6ul-liteboard.dts|imx6ul-liteboard.dts]] //device tree// with configuration for all peripherals from [[litesom:liteboard]]. +
- +
-===== Custom project device tree ===== +
- +
-<columns 100% 40% - -> +
-<uml> +
-object "imx6ul.dtsi" as imx6ul +
-object "imx6ul-litesom.dtsi" as litesom +
-object "imx6ul-liteboard.dtsi" as liteboard +
-object "liteSOM base project" as custom1 +
-object "liteboard base project" as custom2 +
-imx6ul <|-- litesom +
-litesom <|-- custom1 +
-litesom <|-- liteboard +
-liteboard <|-- custom2 +
-</uml> +
- +
-<newcolumn> +
- +
-Of course you can include [[https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/imx6ul-litesom.dtsi|imx6ul-litesom.dtsi]] or [[https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/imx6ul-liteboard.dts|imx6ul-liteboard.dts]] in your project //device tree// and extend existing configuration according to your hardware configuration like presented below. +
- +
-</columns> +
- +
-<grid> +
-<col xs="3"> +
-<thumbnail> +
-<caption>**liteSOM based project**</caption> +
-<uml> +
-package foo <<Node>> { +
-object "imx6ul.dtsi" as imx6ul +
-object "imx6ul-litesom.dtsi" as litesom +
-} +
- +
-object "custom-project.dts" as custom +
-imx6ul <|-- litesom +
-litesom <|-- custom +
-</uml> +
-</thumbnail> +
-</col> +
-<col xs="3"> +
-<thumbnail> +
-<caption>**liteboard based project**</caption> +
-<uml> +
-object "imx6ul.dtsi" as imx6ul +
-object "imx6ul-litesom.dtsi" as litesom +
-object "imx6ul-liteboard.dtsi" as liteboard +
-object "custom-project.dts" as custom +
- +
-imx6ul <|-- litesom +
-litesom <|-- liteboard +
-liteboard <|-- custom +
-</uml> +
-</thumbnail> +
-</col> +
-</grid> +
- +
----- +
- +
-<uml> +
-object "imx6ul.dtsi" as imx6ul +
-object "imx6ul-litesom.dtsi" as litesom +
-object "custom-project.dts" as project +
-imx6ul <|-- litesom +
-litesom <|-- project +
-</uml> +
- +
-<uml> +
-object "imx6ul.dtsi" as imx6ul +
-object "imx6ul-litesom.dtsi" as litesom +
-object "imx6ul-liteboard.dtsi" as liteboard +
-object "custom-project.dts" as project +
- +
-imx6ul <|-- litesom +
-litesom <|-- liteboard +
-liteboard <|-- project +
-</uml> +
- +
-<code>imx6ul.dtsi</code> file is included by [https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/imx6ul-litesom.dtsi imx6ul-litesom.dtsi] where you can find minimal configuration for [[liteSOM]] module. This file can be included in all liteSOM based projects. +
- +
-In our case we are including <code>imx6ul-litesom.dtsi</code> file in [https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/imx6ul-liteboard.dts imx6ul-liteboard.dts] which is a complete configuration for our [[liteSOM]] based [[liteboard]]. +
- +
-Based on [https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/imx6ul-litesom.dtsi imx6ul-litesom.dtsi] and [https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/imx6ul-liteboard.dts imx6ul-liteboard.dts] files you can customize any [[liteSOM]]/[[liteboard]] based project to fit into your project requirements. +
- +
-For example you can check out [https://github.com/grinn-pub/examples/blob/master/board/grinn/liteboard-lcd-res/imx6ul-liteboard-lcd-res.dts imx6ul-liteboard-lcd-res.dts] example where [[liteboard]] is configured to support 800x480 LCD panel with resistive touchscreen.+
  • litesom/devicetree.txt
  • Last modified: 2021/05/10 13:37
  • by kateryna.kozakova